数字ASIC设计概要:High Fanout Net Synthesis

风行水上 @ 2012-09-07 14:45:54
标签:

    High Fanout Net

    • Clock Tree
    • Reset Network
    • Scan Enable Singal Network
    • Normal High Fanout Net

    查找High Fanout Net

    icc_shell> printvar high_fanout_net_threshold
    high_fanout_net_threshold = "1000"
    
    all_high_fanout -nets -through_buf_inv -threshold 1000
    

    High Fanout Net的处理

    Ideal Network

    在design进行layout之前,cell的location是不确定的,这时对于high fanout net的timing估算是很不准确的。
    实践中的作法是把high fanout net的处理推迟到后端,而在前端就把这些net当作理想中的连线,即Ideal Network。

    对于ideal network,不需要进行优化,也不需要进行DRC检查,Timing计算也按照理想值进行。

    前端处理

    set_ideal_network

    • DRC Check Free: max_capacitance, max_fanout, max_transition
    • Latency and Transition Time are constant (default 0)
      • set_ideal_latency / set_ideal_transition
    • size_only for cells on ideal network
    • dont_touch for nets on ideal network

    后端处理

    remove_ideal_network

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