有一条timing path的其中一段如下所示：
... buf_SMC_2/A (THHBUFFXT) 0.013 * 21.471 f (1126.96,3018.00) buf_SMC_2/Y (THHBUFFXT) 0.263 21.735 f (1130.33,3018.60) buf_SMC_N_2 (net) 0.000 21.735 f # dont_touch,long wire buf_SMC_1/A (THHBUFFXT) 9.619 * 31.353 f (1279.84,-4059.60) buf_SMC_1/Y (THHBUFFXT) 1.145 32.499 f (1283.21,-4060.20) buf_SMC_N_1 (net) 0.000 32.499 f # dont_touch buf_SMC/A (THHBUFFXT) 0.006 * 32.504 f (1364.60,-4071.60) buf_SMC/Y (THHBUFFXT) 0.121 32.625 f (1367.97,-4071.00) ...
一个buffer放置在design的顶部，然后纵向“长途跋涉”7000nm多，穿过一个thin channel来到design的底部，造成了9ns多的delay。而且由于net被标注为dont_touch，不能进行优化。
好的布局(placement)结果应该是把3个buffer放在一起。
这固然是因为工具没有足够“聪明”，我们也可以通过更好的constraints来引导工具做得更好。
create_bounds -name buf_SMC -effort medium [get_cell {buf_SMC_2 buf_SMC_1 buf_SMC}]